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Advanced Architectures

Annalisa Massini

Office Hours: appointment by email

News

To get information on lessons and receive notices:

Register on Classroom for the course 2kiiwkid using your Sapienza email address (surname.matricola@studentiNOSPAM.uniroma1.it)
You can use the following link: https://classroom.google.com/c/MjE5ODExNjgzNDRa?cjc=2kiiwkid

The course will start on 24 February 2026.

Lessons are scheduled for:

Tuesday (14:00 - 17.00) - G50, building G, Regina Elena
Thursday (11:00 - 13.00) - 2L Castro Laurenziano

Dear Students, the course will follow the same line as the past years, focusing on advanced topics in computer architecture and an introduction to selected topics in quantum computing. Previously, the course was called Intensive Computation, and since the name change, the topics have mainly concerned computer architectures.

In particular, the course will start with the part on computer architecture and focus on arithmetic circuits and interconnection topologies. The part on quantum computing will focus on quantum arithmetic circuits, to compare the classical solutions with those currently studied for quantum computers.

Lectures 2025-2026

Lecture 1, February 24th, 2026 Introduction to the course. Summary of computer organization and architecture. Lecture 1 - Slide 1-47

Lecture 2, February 26th, 2026 Summary of computer organization and architecture. Lecture 2 - Slide 48-81

Lecture 3, March 3rd, 2026 A very quick summary of computer organisation and architecture with an emphasis on the Control Unit and Cache memory. Lecture 3 - Overview of Computer Architecture
Performance and speed-up: Amdahl's law and Processor performance equation. Lecture 3 - Performance and speed-up - Slide 1-36

Lecture 4, March 5th, 2026 Performance and speed-up: Gustafson-Barsis's law. Communication Performance. Lecture 4 - Performance and speed-up - Slide 37-61
Exercises on Gustafson-Barsis's law and Performance Equation.

Lecture 5, March 10th, 2026 Basic circuits for arithmetic operations: Ripple-carry adder and multiplier for unsigned and signed numbers. Circuits for speeding up arithmetic operations: Pipelined addition. Pipelined unsigned and signed multiplication. Circuits for speeding up arithmetic operations: Carry select adder. Carry look-ahead adder. Lecture 5 - Computer arithmetic - Slides 1-57

Lecture 6, March 12th, 2026 Evaluation of circuit: area and delay. Lecture 6 - Computer arithmetic - Slides 44-65
Exercises on circuit evaluation. Further comments on pipelined adders and multipliers.

Lecture 7, March 17th, 2026 Review of IEEE 754 floating-point format. Lecture 7-IEEE 754 format
Representations for fast arithmetic. Redundant number systems. Lecture 7 - Redundant number systems - Slide 1-21
Exercises: Booth recoding.

Lecture 8, March 19th, 2026 Redundant Number Systems: examples. Lecture 8 - Redundant number systems: examples - Slide 22-58

Lecture 9, March 24th, 2026 Residue Number Systems: Introduction and selection of a module set. Lecture 9 - Residue Number System - Slides 1-23 Exercises: signed digit redundant representations, RB representations and arithmetic operations.

Lecture 10, March 26th, 2026 Residue Number Systems: arithmetic operations, conversion, mixed radix representation. Lecture 10 - Residue Number System - Slides 24-38

Lecture 11, March 31st, 2026 Exercises for the Midterm test: Circuit Delauy and Area, Amdhal Law and Performance equation, Residue Number sistem and the Mixed Radix representation.

Past year lectures

Exam

The exam consists of two parts:

Written exam. Students attending the lessons can take a mid-term exam and a final exam (or a whole exam). Mid-term and final exam (or whole exam) consist in a written test and exercises.

One of the following, at the choice of the student: oral exam/presentation of one-two papers/project.

Text of exams

Exams 2024/2025

Exams 2023/2024

Exams 2022/2023

Exams 2021/2022

Exams 2020/2021
- End-of-term test - 4 June 2021 - with solution
- Midterm test - 16 April 2021

Exams 2018/2019

Exams 2017/2018

Exams 2015/2016

Textbooks - Testi di riferimento

Computer Architecture: A Quantitative Approach J. L. Hennessy, D. A. Patterson - Morgan Kaufmann, 2019
Multicore and GPU Programming An Integrated Approach - G. Barlas - Morgan Kaufmann, 2014
Programming Massively Parallel Processors: A Hands-on Approach, David B. Kirk and Wen-mei W. Hwu, Morgan Kaufmann, 2010
Introduction to High-Performance Scientific Computing, Lloyd D. Fosdick, Elizabeth R. Jessup, Carolyn J. C. Schauble and Gitta Domik, The MIT Press, 1996